This application claims the priority of Korean Patent Application No. 2004-35091, filed on May 18, 2004, in the Korean Intellectual Property Office. The entire content of Korean Patent Application No. 2004-35091 is hereby incorporated herein by reference.
1. Field of the Invention
The present invention relates to semiconductor device test equipment, and more particularly, to a test board for a system level test in which a semiconductor memory device is tested on the main board of a computer.
2. Description of the Related Art
Generally, after semiconductor memory devices, (such as synchronous dynamic random access memory (SDRAM), Rambus (DRAM), and static RAM (SRAM)) are manufactured, an assembled semiconductor device is inserted into a socket and the device is tested using special test equipment.
Since semiconductor device test equipment is very expensive, the cost for testing semiconductor devices is significant. As a result, the price of semiconductor devices takes into account the cost of testing the devices. In addition, since semiconductor device test equipment tests a semiconductor device on a separate system, and not in the environment in which the semiconductor device is actually installed and used, the tests frequently cannot properly take into account environmental characteristics such as the noise that occurs when devices are on the main board of a computer. This can decrease test accuracy. As a result, problems may occur in the quality of the semiconductor devices.
To solve these problems, frequently, semiconductor devices are tested using a computer main board. With this type of testing, a socket is installed on the main board of a computer. A module or a device to be tested is inserted into the socket, and the computer is operated to monitor whether the module or the device is normal or if it has a defect.
Recently, due to high processing speed, the noise that occurs when devices are used in particular environments has become a significant issue relative to quality. Thus, testing semiconductor devices in an environment in which the devices are actually used, i.e., in an installation environment, is often preferred in contrast to testing semiconductor devices in the relatively silent environment provided by semiconductor device test equipment. A test in the installation environment is performed by inserting a semiconductor memory device into the main board of a personal computer or of a work station similar to the main board in which the semiconductor memory device will actually be used. The computer or the work station is then operated and the operation is monitored to determine if the semiconductor memory device is normal or has if it has a defect.
FIG. 1 illustrates a conventional test board for a system level test in which a semiconductor memory device can be tested in a environment similar to that in which the device will be actually used. Referring to FIG. 1, a test board 100 includes a main board 110 on which a central processing unit (CPU) and other electronic parts are installed. Preexisting module sockets 112 into which semiconductor memory devices would normally be inserted have been removed from a front surface 111 of the main board 110. The main board 110 is positioned upside down. Connectors 114 are installed on the rear surface 113 of the main board 110 and connected with connectors 124 on the rear surface 123 of interface board 120. A plurality of test module sockets 122 are installed on the front surface 121 of the interface board 120. The connectors 124 are connected with the test module sockets 122 via signal lines 125.
Electrical test signals generated in the main board 110 are transmitted to the test module sockets 122 via the connectors 114 and 124 and the signal lines 125. The inside of each test module socket 122 is separated when the test module socket 122 is pressed down using a hand, handler, or other tool so that an external contact, i.e., a lead line, of a semiconductor memory device can be inserted into the test module socket 122. After a test device, i.e., a semiconductor memory device, is put on the test module socket 122, pressure on the top of the test module socket 122 is released, and lead lines on the test device is held by and in contact with the test module socket 122.
As a processing speed of a semiconductor memory device increases, the test board 100 must perform tests at high frequency. However, high-frequency testing is often limited by parasitic resistance (R), inductance (L), and capacitance (C), the value of which depends on the height A between the main board 110 and the interface board 120 and a length B of the signal lines 125.
Therefore, an improved test board capable of reducing the length of the signal lines and capable of performing a high-frequency test is desired.